Display works
This commit is contained in:
Dylan Smith
120
Core/Inc/main.h
120
Core/Inc/main.h
@@ -244,6 +244,126 @@ void Error_Handler(void);
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/* USER CODE BEGIN Private defines */
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#define LCD_RES_HIGH(void) GPIOA->BSRR=GPIO_BSRR_BS7
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#define LCD_RES_LOW(void) GPIOA->BSRR=GPIO_BSRR_BR7
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#define LCD_CS_HIGH(void) GPIOC->BSRR=GPIO_BSRR_BS2
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#define LCD_CS_LOW(void) GPIOC->BSRR=GPIO_BSRR_BR2
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#define LCD_DC_HIGH(void) GPIOD->BSRR=GPIO_BSRR_BS13
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#define LCD_DC_LOW(void) GPIOD->BSRR=GPIO_BSRR_BR13
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#define ILI9341_HSYNC ((uint32_t)9) /* Horizontal synchronization */
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#define ILI9341_HBP ((uint32_t)29) /* Horizontal back porch */
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#define ILI9341_HFP ((uint32_t)2) /* Horizontal front porch */
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#define ILI9341_VSYNC ((uint32_t)1) /* Vertical synchronization */
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#define ILI9341_VBP ((uint32_t)3) /* Vertical back porch */
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#define ILI9341_VFP ((uint32_t)2) /* Vertical front porch */
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/**
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* @brief ILI9341 Registers
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*/
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/* Level 1 Commands */
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/* Level 1 Commands */
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#define ILI9341_SWRESET 0x01U /* Software Reset */
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#define ILI9341_READ_DISPLAY_ID 0x04U /* Read display identification information */
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#define ILI9341_RDDST 0x09U /* Read Display Status */
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#define ILI9341_RDDPM 0x0AU /* Read Display Power Mode */
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#define ILI9341_RDDMADCTL 0x0BU /* Read Display MADCTL */
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#define ILI9341_RDDCOLMOD 0x0CU /* Read Display Pixel Format */
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#define ILI9341_RDDIM 0x0DU /* Read Display Image Format */
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#define ILI9341_RDDSM 0x0EU /* Read Display Signal Mode */
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#define ILI9341_RDDSDR 0x0FU /* Read Display Self-Diagnostic Result */
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#define ILI9341_SPLIN 0x10U /* Enter Sleep Mode */
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#define ILI9341_SLEEP_OUT 0x11U /* Sleep out register */
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#define ILI9341_PTLON 0x12U /* Partial Mode ON */
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#define ILI9341_NORMAL_MODE_ON 0x13U /* Normal Display Mode ON */
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#define ILI9341_DINVOFF 0x20U /* Display Inversion OFF */
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#define ILI9341_DINVON 0x21U /* Display Inversion ON */
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#define ILI9341_GAMMA 0x26U /* Gamma register */
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#define ILI9341_DISPLAY_OFF 0x28U /* Display off register */
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#define ILI9341_DISPLAY_ON 0x29U /* Display on register */
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#define ILI9341_CASET 0x2AU /* Column address register */
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#define ILI9341_RASET 0x2BU /* Page address register */
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#define ILI9341_GRAM 0x2CU /* GRAM register */
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#define ILI9341_RGBSET 0x2DU /* Color SET */
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#define ILI9341_RAMRD 0x2EU /* Memory Read */
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#define ILI9341_PLTAR 0x30U /* Partial Area */
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#define ILI9341_VSCRDEF 0x33U /* Vertical Scrolling Definition */
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#define ILI9341_TEOFF 0x34U /* Tearing Effect Line OFF */
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#define ILI9341_TEON 0x35U /* Tearing Effect Line ON */
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#define ILI9341_MAC 0x36U /* Memory Access Control register*/
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#define ILI9341_VSCRSADD 0x37U /* Vertical Scrolling Start Address */
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#define ILI9341_IDMOFF 0x38U /* Idle Mode OFF */
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#define ILI9341_IDMON 0x39U /* Idle Mode ON */
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#define ILI9341_PIXEL_FORMAT 0x3AU /* Pixel Format register */
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#define ILI9341_WRITE_MEM_CONTINUE 0x3CU /* Write Memory Continue */
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#define ILI9341_READ_MEM_CONTINUE 0x3EU /* Read Memory Continue */
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#define ILI9341_SET_TEAR_SCANLINE 0x44U /* Set Tear Scanline */
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#define ILI9341_GET_SCANLINE 0x45U /* Get Scanline */
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#define ILI9341_WDB 0x51U /* Write Brightness Display register */
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#define ILI9341_RDDISBV 0x52U /* Read Display Brightness */
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#define ILI9341_WCD 0x53U /* Write Control Display register*/
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#define ILI9341_RDCTRLD 0x54U /* Read CTRL Display */
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#define ILI9341_WRCABC 0x55U /* Write Content Adaptive Brightness Control */
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#define ILI9341_RDCABC 0x56U /* Read Content Adaptive Brightness Control */
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#define ILI9341_WRITE_CABC 0x5EU /* Write CABC Minimum Brightness */
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#define ILI9341_READ_CABC 0x5FU /* Read CABC Minimum Brightness */
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#define ILI9341_READ_ID1 0xDAU /* Read ID1 */
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#define ILI9341_READ_ID2 0xDBU /* Read ID2 */
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#define ILI9341_READ_ID3 0xDCU /* Read ID3 */
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/* Level 2 Commands */
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#define ILI9341_RGB_INTERFACE 0xB0U /* RGB Interface Signal Control */
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#define ILI9341_FRMCTR1 0xB1U /* Frame Rate Control (In Normal Mode) */
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#define ILI9341_FRMCTR2 0xB2U /* Frame Rate Control (In Idle Mode) */
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#define ILI9341_FRMCTR3 0xB3U /* Frame Rate Control (In Partial Mode) */
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#define ILI9341_INVTR 0xB4U /* Display Inversion Control */
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#define ILI9341_BPC 0xB5U /* Blanking Porch Control register */
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#define ILI9341_DFC 0xB6U /* Display Function Control register */
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#define ILI9341_ETMOD 0xB7U /* Entry Mode Set */
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#define ILI9341_BACKLIGHT1 0xB8U /* Backlight Control 1 */
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#define ILI9341_BACKLIGHT2 0xB9U /* Backlight Control 2 */
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#define ILI9341_BACKLIGHT3 0xBAU /* Backlight Control 3 */
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#define ILI9341_BACKLIGHT4 0xBBU /* Backlight Control 4 */
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#define ILI9341_BACKLIGHT5 0xBCU /* Backlight Control 5 */
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#define ILI9341_BACKLIGHT7 0xBEU /* Backlight Control 7 */
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#define ILI9341_BACKLIGHT8 0xBFU /* Backlight Control 8 */
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#define ILI9341_POWER1 0xC0U /* Power Control 1 register */
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#define ILI9341_POWER2 0xC1U /* Power Control 2 register */
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#define ILI9341_VCOM1 0xC5U /* VCOM Control 1 register */
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#define ILI9341_VCOM2 0xC7U /* VCOM Control 2 register */
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#define ILI9341_NVMWR 0xD0U /* NV Memory Write */
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#define ILI9341_NVMPKEY 0xD1U /* NV Memory Protection Key */
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#define ILI9341_RDNVM 0xD2U /* NV Memory Status Read */
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#define ILI9341_READ_ID4 0xD3U /* Read ID4 */
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#define ILI9341_PGAMMA 0xE0U /* Positive Gamma Correction register */
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#define ILI9341_NGAMMA 0xE1U /* Negative Gamma Correction register */
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#define ILI9341_DGAMCTRL1 0xE2U /* Digital Gamma Control 1 */
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#define ILI9341_DGAMCTRL2 0xE3U /* Digital Gamma Control 2 */
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#define ILI9341_INTERFACE 0xF6U /* Interface control register */
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/* Extend register commands */
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#define ILI9341_POWERA 0xCBU /* Power control A register */
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#define ILI9341_POWERB 0xCFU /* Power control B register */
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#define ILI9341_DTCA 0xE8U /* Driver timing control A */
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#define ILI9341_DTCB 0xEAU /* Driver timing control B */
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#define ILI9341_POWER_SEQ 0xEDU /* Power on sequence register */
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#define ILI9341_3GAMMA_EN 0xF2U /* 3 Gamma enable register */
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#define ILI9341_PRC 0xF7U /* Pump ratio control register */
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#define MADCTL_MY 0x80 ///< Bottom to top
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#define MADCTL_MX 0x40 ///< Right to left
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#define MADCTL_MV 0x20 ///< Reverse Mode
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#define MADCTL_ML 0x10 ///< LCD refresh Bottom to top
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#define MADCTL_RGB 0x00 ///< Red-Green-Blue pixel order
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#define MADCTL_BGR 0x08 ///< Blue-Green-Red pixel order
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#define MADCTL_MH 0x04 ///< LCD refresh right to left
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/* Size of read registers */
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#define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */
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/* USER CODE END Private defines */
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#ifdef __cplusplus
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176
Core/Src/main.c
176
Core/Src/main.c
@@ -20,8 +20,7 @@
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#include "main.h"
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#include "cmsis_os.h"
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#include "stm32f4xx_hal_ltdc.h"
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#include "stm32f4xx_hal_sdram.h"
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#include "stm32f4xx_ll_fmc.h"
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#include "stm32f4xx_hal_spi.h"
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#include "usb_host.h"
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/* Private includes ----------------------------------------------------------*/
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@@ -88,6 +87,166 @@ void StartDefaultTask(void const * argument);
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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void LCD_Write_Cmd(uint8_t cmd)
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{
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LCD_CS_LOW();
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LCD_DC_LOW();
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HAL_SPI_Transmit(&hspi5, &cmd, 1, 1000);
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LCD_CS_HIGH();
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}
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void LCD_Write_Data (uint8_t data)
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{
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LCD_CS_LOW();
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LCD_DC_HIGH();
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HAL_SPI_Transmit(&hspi5, &data, 1, 1000);
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LCD_CS_HIGH();
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}
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//initialize the tft
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void ILI9341_Init(void)
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{
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LCD_RES_LOW();
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osDelay(50);
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LCD_RES_HIGH();
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osDelay(20);
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LCD_Write_Cmd(ILI9341_SWRESET);
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osDelay(10);
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LCD_Write_Cmd(ILI9341_POWERB);
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osDelay(10);
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LCD_Write_Data(0x00);;
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LCD_Write_Data(0xD9);
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LCD_Write_Data(0x30);
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LCD_Write_Cmd(ILI9341_POWER_SEQ);
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LCD_Write_Data(0x64);
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LCD_Write_Data(0x03);
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LCD_Write_Data(0X12);
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LCD_Write_Data(0X81);
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LCD_Write_Cmd(ILI9341_DTCA);
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LCD_Write_Data(0x85);
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LCD_Write_Data(0x10);
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LCD_Write_Data(0x7A);
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LCD_Write_Cmd(ILI9341_POWERA);
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LCD_Write_Data(0x39);
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LCD_Write_Data(0x2C);
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LCD_Write_Data(0x00);
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LCD_Write_Data(0x34);
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LCD_Write_Data(0x02);
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LCD_Write_Cmd(ILI9341_PRC);
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LCD_Write_Data(0x20);
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LCD_Write_Cmd(ILI9341_DTCB);
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LCD_Write_Data(0x00);
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LCD_Write_Data(0x00);
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LCD_Write_Cmd(ILI9341_POWER1);
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LCD_Write_Data(0x1B);
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LCD_Write_Cmd(ILI9341_POWER2);
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LCD_Write_Data(0x12);
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LCD_Write_Cmd(ILI9341_VCOM1);
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LCD_Write_Data(0x08);
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LCD_Write_Data(0x26);
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LCD_Write_Cmd(ILI9341_VCOM2);
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LCD_Write_Data(0XB7);
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LCD_Write_Cmd(ILI9341_PIXEL_FORMAT);
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LCD_Write_Data(0x55); //select RGB565
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LCD_Write_Cmd(ILI9341_FRMCTR1);
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LCD_Write_Data(0x00);
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LCD_Write_Data(0x1B);//frame rate = 70
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LCD_Write_Cmd(ILI9341_DFC); // Display Function Control
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LCD_Write_Data(0x0A);
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LCD_Write_Data(0xA2);
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LCD_Write_Cmd(ILI9341_3GAMMA_EN); // 3Gamma Function Disable
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LCD_Write_Data(0x02);
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LCD_Write_Cmd(ILI9341_GAMMA);
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LCD_Write_Data(0x01);
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LCD_Write_Cmd(ILI9341_PGAMMA); //Set Gamma
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LCD_Write_Data(0x0F);
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LCD_Write_Data(0x1D);
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LCD_Write_Data(0x1A);
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LCD_Write_Data(0x0A);
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LCD_Write_Data(0x0D);
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LCD_Write_Data(0x07);
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LCD_Write_Data(0x49);
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LCD_Write_Data(0X66);
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LCD_Write_Data(0x3B);
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LCD_Write_Data(0x07);
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LCD_Write_Data(0x11);
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LCD_Write_Data(0x01);
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LCD_Write_Data(0x09);
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LCD_Write_Data(0x05);
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LCD_Write_Data(0x04);
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LCD_Write_Cmd(ILI9341_NGAMMA);
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LCD_Write_Data(0x00);
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LCD_Write_Data(0x18);
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LCD_Write_Data(0x1D);
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LCD_Write_Data(0x02);
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LCD_Write_Data(0x0F);
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LCD_Write_Data(0x04);
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LCD_Write_Data(0x36);
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LCD_Write_Data(0x13);
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LCD_Write_Data(0x4C);
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LCD_Write_Data(0x07);
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LCD_Write_Data(0x13);
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LCD_Write_Data(0x0F);
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LCD_Write_Data(0x2E);
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LCD_Write_Data(0x2F);
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LCD_Write_Data(0x05);
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LCD_Write_Cmd(ILI9341_RGB_INTERFACE);
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LCD_Write_Data(0xC2); //Data is fetched during falling edge of DOTCLK
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LCD_Write_Cmd(ILI9341_INTERFACE);
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LCD_Write_Data(0x01);
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LCD_Write_Data(0x00);
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LCD_Write_Data(0x06);
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LCD_Write_Cmd(ILI9341_MAC); // Memory Access Control command
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LCD_Write_Data(MADCTL_BGR);
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LCD_Write_Cmd(ILI9341_SLEEP_OUT); //Exit Sleep
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osDelay(100);
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LCD_Write_Cmd(ILI9341_DISPLAY_ON); //display on
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osDelay(100);
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}
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/* USER CODE END 0 */
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/**
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@@ -193,7 +352,7 @@ void SystemClock_Config(void)
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 4;
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RCC_OscInitStruct.PLL.PLLM = 16;
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RCC_OscInitStruct.PLL.PLLN = 72;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 3;
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@@ -385,7 +544,10 @@ static void MX_LTDC_Init(void)
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Error_Handler();
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}
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/* USER CODE BEGIN LTDC_Init 2 */
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/* Enable Layer 1 */
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__HAL_LTDC_LAYER_ENABLE(&hltdc, 0);
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/* Reload configuration immediately */
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__HAL_LTDC_RELOAD_IMMEDIATE_CONFIG(&hltdc);
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/* USER CODE END LTDC_Init 2 */
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}
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@@ -694,17 +856,17 @@ static void MX_GPIO_Init(void)
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void StartDefaultTask(void const * argument)
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{
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/* init code for USB_HOST */
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MX_USB_HOST_Init();
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/* USER CODE BEGIN 5 */
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times_changed = 0;
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ILI9341_Init();
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/* Infinite loop */
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for(;;)
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{
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DisplayTest(0xffff);
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HAL_LTDC_Reload(&hltdc, LTDC_RELOAD_IMMEDIATE);
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osDelay(500);
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DisplayTest(0x0000);
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HAL_LTDC_Reload(&hltdc, LTDC_RELOAD_IMMEDIATE);
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osDelay(500);
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}
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/* USER CODE END 5 */
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@@ -271,9 +271,9 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
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/** Initializes the peripherals clock
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*/
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
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PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
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PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
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PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
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PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
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PeriphClkInitStruct.PLLSAI.PLLSAIR = 4;
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PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_16;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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Error_Handler();
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@@ -886,29 +886,30 @@ RCC.HCLKFreq_Value=72000000
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RCC.HSE_VALUE=8000000
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RCC.HSI_VALUE=16000000
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RCC.I2SClocksFreq_Value=192000000
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RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LCDTFTFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSAIN,RTCFreq_Value,RTCHSEDivFreq_Value,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,VcooutputI2S,VcooutputI2SQ
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RCC.LCDTFTFreq_Value=25000000
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RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LCDTFTFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSAIDivR,PLLSAIN,PLLSAIR,RTCFreq_Value,RTCHSEDivFreq_Value,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,VcooutputI2S,VcooutputI2SQ
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RCC.LCDTFTFreq_Value=6000000
|
||||
RCC.LSE_VALUE=32768
|
||||
RCC.LSI_VALUE=32000
|
||||
RCC.MCO2PinFreq_Value=72000000
|
||||
RCC.PLLCLKFreq_Value=72000000
|
||||
RCC.PLLM=4
|
||||
RCC.PLLN=72
|
||||
RCC.PLLQ=3
|
||||
RCC.PLLQCLKFreq_Value=48000000
|
||||
RCC.PLLSAIN=50
|
||||
RCC.PLLSAIDivR=RCC_PLLSAIDIVR_16
|
||||
RCC.PLLSAIN=192
|
||||
RCC.PLLSAIR=4
|
||||
RCC.RTCFreq_Value=32000
|
||||
RCC.RTCHSEDivFreq_Value=4000000
|
||||
RCC.SAI_AClocksFreq_Value=25000000
|
||||
RCC.SAI_BClocksFreq_Value=25000000
|
||||
RCC.SAI_AClocksFreq_Value=96000000
|
||||
RCC.SAI_BClocksFreq_Value=96000000
|
||||
RCC.SYSCLKFreq_VALUE=72000000
|
||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
RCC.VCOI2SOutputFreq_Value=384000000
|
||||
RCC.VCOInputFreq_Value=2000000
|
||||
RCC.VCOOutputFreq_Value=144000000
|
||||
RCC.VCOSAIOutputFreq_Value=100000000
|
||||
RCC.VCOSAIOutputFreq_ValueQ=25000000
|
||||
RCC.VCOSAIOutputFreq_ValueR=50000000
|
||||
RCC.VCOSAIOutputFreq_Value=384000000
|
||||
RCC.VCOSAIOutputFreq_ValueQ=96000000
|
||||
RCC.VCOSAIOutputFreq_ValueR=96000000
|
||||
RCC.VcooutputI2S=192000000
|
||||
RCC.VcooutputI2SQ=192000000
|
||||
SH.FMC_A0.0=FMC_A0,12b-sda1
|
||||
|
||||
Reference in New Issue
Block a user